论文标题
TEDA算法的硬件体系结构提案数据流异常检测
Hardware Architecture Proposal for TEDA algorithm to Data Streaming Anomaly Detection
论文作者
论文摘要
实时的数据量(例如时间序列和流数据)今天可用。能够在到达的那一刻能够带来巨大的附加值时分析这些数据。但是,这也需要大量的计算工作和新的加速技术。作为解决此问题的可能解决方案,本文提出了用于典型性和偏心数据分析(TEDA)算法的硬件体系结构,该算法在现场可编程门阵列(FPGA)上实施,用于数据流异常检测。 TEDA基于数据流上下文中的新方法进行异常检测。为了验证提议,提出了提议硬件的职业和吞吐量的结果。此外,还提供了精确的模拟结果。该项目旨在Xilinx VirTex-6 XC6VLX240T-1FF1156作为目标FPGA。
The amount of data in real-time, such as time series and streaming data, available today continues to grow. Being able to analyze this data the moment it arrives can bring an immense added value. However, it also requires a lot of computational effort and new acceleration techniques. As a possible solution to this problem, this paper proposes a hardware architecture for Typicality and Eccentricity Data Analytic (TEDA) algorithm implemented on Field Programmable Gate Arrays (FPGA) for use in data streaming anomaly detection. TEDA is based on a new approach to outlier detection in the data stream context. In order to validate the proposals, results of the occupation and throughput of the proposed hardware are presented. Besides, the bit accurate simulation results are also presented. The project aims to Xilinx Virtex-6 xc6vlx240t-1ff1156 as the target FPGA.