论文标题
ESP4ML：基于平台的用于嵌入式机器学习的芯片的设计
ESP4ML: Platform-Based Design of Systems-on-Chip for Embedded Machine Learning
论文作者
论文摘要
我们提出ESP4ML，这是一种开源系统级设计流，用于嵌入式应用程序构建和编程SOC架构，需要机器学习和信号处理算法的硬件加速度。我们通过将两个已建立的开源项目（ESP和HLS4ML）结合到一个全新的全自动设计流中来实现ESP4ML。对于HLS4ML生成的加速器的SOC集成，我们设计了一组新的参数化接口电路，可与高级合成合成。对于加速器的配置和管理，我们在Linux顶部开发了一个嵌入式软件运行时系统。使用此HW/SW层，我们解决了动态构建网络芯片上的数据流量的挑战，以激活和支持可重新配置的加速器管道，这是当前在SOC上运行的应用程序工作负载所需的。我们通过基于FPGA的实现来证明我们的垂直综合贡献，该实现的实现了启动Linux并执行从Google Street View数据库中拍摄的图像的计算机视觉应用程序。
We present ESP4ML, an open-source system-level design flow to build and program SoC architectures for embedded applications that require the hardware acceleration of machine learning and signal processing algorithms. We realized ESP4ML by combining two established open-source projects (ESP and HLS4ML) into a new, fully-automated design flow. For the SoC integration of accelerators generated by HLS4ML, we designed a set of new parameterized interface circuits synthesizable with high-level synthesis. For accelerator configuration and management, we developed an embedded software runtime system on top of Linux. With this HW/SW layer, we addressed the challenge of dynamically shaping the data traffic on a network-on-chip to activate and support the reconfigurable pipelines of accelerators that are needed by the application workloads currently running on the SoC. We demonstrate our vertically-integrated contributions with the FPGA-based implementations of complete SoC instances booting Linux and executing computer-vision applications that process images taken from the Google Street View database.
