论文标题

Smartho的设计和实施 - 基于P4的Xilinx NetFPGA开关的NG-RAN的网络启动移交机制

Design and Implementation of SMARTHO -- A Network Initiated Handover mechanism in NG-RAN, on P4-based Xilinx NetFPGA switches

论文作者

Palagummi, Phanindra, Sivalingam, Krishna M.

论文摘要

本报告使用可编程数据平面开关介绍了5G网络中无线电访问网络(RAN)的切换方案的设计。在5G网络中,NG-RAN体系结构将基本频段单元(BBU)分为中央和分布式单元(CU和DU)。该结构创建了一个中间网络,连接了CUS和DUS。 DataPlane可编程性的最新进步可用于增强系统性能。我们展示了如何使用P4开关来解析DU,CU和Back Haul(核心网络)之间的数据包,以进行潜在的系统改进。特别是,我们考虑移动移交的情况。提出的协议称为Smartho,说明了智能移交。 编程协议无关的数据包处理器(P4)是一种编程语言,旨在支持网络交换机/路由器的转发平面行为。在Smartho中,我们使用P4开关来干预固定路径移动用户的交换过程。提出了在UE到达未来单元之前保留资源的资源预分配方案。使用CU和DU之间引入的基于P4的开关来实现解决方案。 P4开关用于欺骗用户设备(UE)的行为并提前执行资源分配。 所提出的Smartho框架是在Mininet仿真环境中以及使用NetFPGA-SUME板的可重新配置硬件环境中实现的。仿真结果表明,两个HOS的串联串联的交换响应时间提高了18%,三个HOS的串联时间为25%。对于测试台实施,我们将NETFPGA-SUME板用作P4开关。在实验中,将切换时间测得约为50毫秒。

This report deals with the design of handover schemes for radio access networks (RAN) in 5G networks, using programmable data plane switches. In 5G networks, the NG-RAN architecture splits the Base Band Unit (BBU) into Central and Distributed Units (CU and DU). This structure has created a mid-haul Network, connecting CUs and DUs. The recent advancements in dataplane programmability can be used to enhance system performance. We show how P4 switches can be used to parse the packets between DU, CU, and Back Haul (Core Network) for potential system improvements. In particular, we consider the scenario of mobile handover. The proposed protocol is called SMARTHO, illustrating a smart handover. Programming Protocol-Independent Packet Processors (P4) is a programming language designed to support specification and programming the forwarding plane behavior of network switches/routers. In SMARTHO, we use P4 Switches to intervene in the handover process for fixed-path mobile users. A resource pre-allocation scheme that reserves resources before the UE reaches a future cell, is proposed. The solution is implemented using a P4-based switch introduced between the CU and the DU. The P4 switch is used to spoof the behavior of User Equipment (UE) and perform the resource allocation in advance. The proposed SMARTHO framework is implemented in the mininet emulation environment and in a reconfigurable hardware environment using NetFPGA-SUME boards. The emulation results show a handover response time improvement of 18% for a tandem of two HOs and 25% for a tandem of three HOs. For testbed implementation, we used NetFPGA-SUME boards as P4 switches. The handover time was measured to be approximately 50~milliseconds in the experiments conducted.

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