论文标题
将源级调试框架带到硬件生成器
Bringing Source-Level Debugging Frameworks to Hardware Generators
论文作者
论文摘要
高级硬件生成器已大大提高了设计工程师的生产率。他们使用软件工程结构来减少表达复杂设计所需的重复，并启用更多的合成性。但是，由于缺乏调试基础架构，这些好处受到了破坏，要求硬件设计人员要生成（通常无法理解的RTL代码）。本文介绍了一个框架，该框架将现代软件源级调试框架连接到由硬件生成器创建的RTL。我们的工作原型为Rockethip（Chisel）等发电机提供了集成的开发环境（IDE）体验，使设计人员可以将重量源代码的断点设置为重点，将RTL仿真状态与源级变量相关联，并且向前和后方的调试，几乎没有模拟范围（少于5％）。
High-level hardware generators have significantly increased the productivity of design engineers. They use software engineering constructs to reduce the repetition required to express complex designs and enable more composability. However, these benefits are undermined by a lack of debugging infrastructure, requiring hardware designers to debug generated, usually incomprehensible, RTL code. This paper describes a framework that connects modern software source-level debugging frameworks to RTL created from hardware generators. Our working prototype offers an Integrated Development Environment (IDE) experience for generators such as RocketChip (Chisel), allowing designers to set breakpoints in complex source code, relate RTL simulation state back to source-level variables, and do forward and backward debugging, with almost no simulation overhead (less than 5%).
