论文标题
在模拟硬件上可转移学习
Transferable Learning on Analog Hardware
论文作者
论文摘要
虽然模拟神经网络（NN）加速器有望节省大量的能量和时间，但一个重要的挑战是使它们对静态制造误差进行健全。领先的模拟NN平台的可编程光子干涉仪电路的当前训练方法不会产生在存在静态硬件错误的情况下表现良好的网络。此外，现有的硬件错误校正技术要么需要单独重新训练每个模拟NN（在带有数百万个设备的边缘设置中是不切实际的），要对组件质量提出严格的需求，或者对硬件开销引入硬件。我们通过引入一次性错误感知的训练技术来解决所有三个问题，从而产生可靠的NNS，可与理想硬件的性能相匹配，并且可以将其完全传递到任意高度故障的光子NNS，其硬件错误最高可比当前的制造公差大5倍。
While analog neural network (NN) accelerators promise massive energy and time savings, an important challenge is to make them robust to static fabrication error. Present-day training methods for programmable photonic interferometer circuits, a leading analog NN platform, do not produce networks that perform well in the presence of static hardware errors. Moreover, existing hardware error correction techniques either require individual re-training of every analog NN (which is impractical in an edge setting with millions of devices), place stringent demands on component quality, or introduce hardware overhead. We solve all three problems by introducing one-time error-aware training techniques that produce robust NNs that match the performance of ideal hardware and can be exactly transferred to arbitrary highly faulty photonic NNs with hardware errors up to 5x larger than present-day fabrication tolerances.
