论文标题
调整固体中的电导拓扑
Tuning the conductance topology in solids
论文作者
论文摘要
非平衡电荷载体捕获和逐渐捕获的惯性会以非常奇特的方式影响散装和纳米镜结构的电化学和运输特性。在当前电压响应中具有滞后的新兴内存响应，其最终由这种普遍可用的成分产生的最终多重交叉是此过程的签名。在这里，我们为这些行为提供了微观和分析解决方案，被理解为当前电压回路拓扑的调节。因此，记忆出现成为影响固体特征的特征工具，该特征会影响固体的电子传输，例如诱捕位点的性质和数量，固有的对称约束和自然放松时间尺度。该方法还能够降低可观察到各种系统的频率依赖性电化学阻抗和循环伏安法的复杂性，从而将各种系统变成简单的显微成分的组合。
The inertia of trapping and detrapping of nonequilibrium charge carriers affects the electrochemical and transport properties of both bulk and nanoscopic structures in a very peculiar way. An emerging memory response with a hysteresis in the current-voltage response and its eventual multiple crossing, produced by this universally available ingredient, are signatures of this process. Here, we deliver a microscopic and analytical solution for these behaviors, understood as the modulation of the topology of the current-voltage loops. The memory emergence becomes thus a characterization tool for intrinsic features that affect the electronic transport of solids such as the nature and number of trapping sites, intrinsic symmetry constraints, and natural relaxation time scales. This method is also able to reduce the seeming complexity of frequency-dependent electrochemical impedance and cyclic voltammetry observable for a variety of systems to a combination of simple microscopic ingredients.
